Bipolar transistors (BJTs) are commonly used in semiconductor devices especially for high speed operation and large drive current applications. A double polysilicon BJT 10 is shown in FIG. 1. The area for the BJT 10 is isolated by field oxides 12. The collector 14 is a lightly doped epitaxial layer of one conductivity type and the base region is formed by doped regions 16 and 18 of the opposite conductivity type. Doped region 16 is called the intrinsic base region and region 18 is the extrinsic base region. The extrinsic base region 18 provides an area for connecting to the base region. The base electrode 20 comprises a first doped polysilicon layer. The emitter region 22 is a doped region of the same conductivity type as the collector and is located within the intrinsic base region 16. The emitter electrode 24 is accomplished with a second doped polysilicon layer. Oxide region 26 and base-emitter spacers 28 isolate the emitter electrode 24 from the base electrode 20. Double polysilicon BJTs have the further advantage of lower base resistance and reduced extrinsic capacitances over single polysilicon BJTs. However, this advantage is gained by accepting additional process complexities such as those associated with the etching of polysilicon from the active device areas and the out diffusion of a base link-up doping region from a highly doped polysilicon diffusion source.
The BJT of FIG. 1 is typically formed by forming a doped polysilicon layer and an oxide layer over a silicon active area (collector 14) and the field oxides 12. The polysilicon and oxide layers are then etched as shown in FIG. 2 to form the base electrode 20. However, because polysilicon is etched directly over the silicon active area, overetch and removal of some of silicon active area 14 occurs. This is due to the difficulty in selectively etching polysilicon with respect to silicon. This results in a non-planar active device area. The amount of overetch is difficult to control, causes surface roughness and causes defects and impurities in the surface.
Referring to FIG. 3, the extrinsic base region 18 is diffused from the first polysilicon layer (the base electrode 20). Base link-up (the linking between the extrinsic and intrinsic base regions) is accomplished by the out-diffusion from the base electrode 20. The intrinsic base region 16 is then implanted and the base-emitter spacers 28 are formed. The diffusion length for low resistance base link-up varies with the overetch. An "overlinked" base reduces the breakdown voltage of the emitter-base junction and "underlinked" base increases the resistance of the extrinsic base. Furthermore, the sheet resistance of the base electrode must be adjusted to control the depth of the extrinsic base region 18. The process continues with the formation of a second doped polysilicon layer that is subsequently etched to form the emitter electrode 24 and the diffusion of a dopant from the emitter electrode 24 to form the emitter region 22.
The advantages of the double polysilicon BJT must currently be balanced against the process complexities described above. Accordingly, there is a need for a method of forming a BJT that reduces these process complexities.